A busy summer
17
Aug
2018
In the heat of the summer, new families are being launched, who would have known? ST created the STM32F7x0 and STM32H7x0 with minimal amounts of Flash memory and the result is… a Cortex-M7 part for $1.64@1ku. NXP showed the MKW35/36, a BT5 Cortex-M0+ MCU focused on the automotive market while the new Cypress PSoC 4700 family chases the UI market with advanced sensing coupled with a Cortex-M0+ MCU, what a summer.
There were minor adds to the ATTiny portfolio
On the Cortex-M front, Microchip added a few package variants to the SAML10 with the 24-pin SAML10D.
No change.
No change.
Microchip added over 80 variants to the dsPIC33CH announced last month. It is a dual-core built for motor control and industrial applications.
Nordic launched the nRF51822, with BT5 and proprietary stacks on a Cortex-M0 dressed in 48-QFN and WLCSP packages.
No change.
NXP just launched the KW35/36, a BT5/Generic FSK connectivity for the automotive market. The KW35/36 integrates a Cortex-M0+, up to 512/64 kB Flash/RAM. The Kinetis KW35/36A feature AEC Q100-Grade 2 temperature range qualification.
No significant change.
There were a few EFR32BG parts (Bluetooth) adding a new QFN68 package combination.
Cypress launches the PSoC 4700 Family with advanced sensing. This family includes the PSoC 4700 S-Series with a 48 MHz Cortex-M0+, 32/4 kB Flash/RAM, 1x 10-bit ADC, 2x comparators, 2x 7-bit IDACs, an inductive sensing block that enables sensing of metal objects, a CapSense block with self- and mutual-capacitance sensing, 2x multiplexed I2C, SPI or UART. It comes in WLCSP25, QFN24 or TQFP48.
ST just launched the Cortex-M7 based STM32F7x0 and H7x0 Value Lines and emphasizes low cost, upward compatibility with larger Flash/RAM sized members of the F7/H7 family. It is interesting to note these parts are not flashless but nevertheless hit a similar market than NXP’s i.MXRT.
The 216 MHz STM32F730 keeps cryptographic hardware acceleration, a USB2 HS with PHY, and a CAN interface. On the memory side, 64 kB Flash with 8 kB I/D caches and 256 kB RAM and 16kB+64KB of TCM for the most critical routines and data.
The STM32F750 adds a TFT-LCD and graphics acceleration, 2x CAN, Ethernet, camera interface, and 2x USB2 with FS PHY. There are 64Kbytes of Flash, 4Kbyte instruction and 4Kbyte data caches, 320KB of system RAM, and 16kB+64KB TCM.
Finally, the 400 MHz STM32H750 adds a hardware JPEG coder/decoder a CANFD port, 16-bit ADCs with 128 kB Flash, 16 kB I/D caches, 864 kB RAM and the 64kB+128KB of TCM.
The STM32F730, STM32F750, and STM32H750 Value Line MCUs are in production, with LQFP and BGA package options from 64-pin to 240-pin. Prices start from $1.64 for the STM32F730, $2.39 for the STM32F750 and $2.69 for the STM32H750 for 1ku.
No significant change.
Flash-less, the new fashion trend?
30
Jun
2018
Who would have known that we would see in the same month more flashless devices at extreme ends of the spectrum? From the souped up i.MXRT1060 (600MHz) to the low power BT5 Dialog Semi DA14683, the market seems ready for more non-volatile memory options. Flashless will not solve the world’s problem, but this is an interesting architecture to consider. Microchip on its end showed us another type of architecture with a motor-control dual core processor. So many options to choose from…
The big news was the creation of a new family – SAML1x – based on the Cortex-M23. The Cortex-M23 (Cortex-M0+ like) and its more powerful brother the Cortex-M33 (Cortex-M3-like) are both built on the ARMv8-M architecture that incorporates trusted hardware using the TrustZone technology. They were announced back in October 2016. These are features the IoT market has been looking for. The SAML11 embeds secure elements from the architecture including TrustZone, secure debug, crypto, memory scrambling and secure boot, not found on the SAML10.
Performance-wise, both run at 32MHz and have an active current of 25uA/MHz, about a third less than the Cortex-M0+ based SAML2x. The 24-strong members of the family start at 16/4 kB of Flash/RAM for a 5k price of $1.17 and expand up to 64/16 with USB for $1.47.
Dialog released the DA14682/3 products, upgrading the DA14680 with BT5 and cryptographic accelerators. The DA14683 participates into a larger trend of flash-less MCUs – more with NXP below.
No change.
Microchip created another surpise with the creation of the dsPIC33CH, a dual-core built for motor control and industrial applications. Interestingly the cores run in a master/slave model where the slave can run up to 200MHz vs. 180MHz for the master. 20 products we released from 64+24 / 16+4 Flash/RAM (master+slave) to 128+24 / 16+4, with prices ranging from $2.73 to $3.72 @5k.
No change.
No change.
NXP quietly added the i.MXRT1060 – although no products are found yet. As its siblings, the 1060 is flashless and can run up to 600MHz but it doubles the RAM to 1 MB which is the highest SRAM density with the STM32H7 on the MCU market.
Flash size apart, the i.MXRT (528-600MHz) family is close to the STM32H7xx (400MHz) and the ATSAMV7 (300MHz) as they are all Cortex-M7 based with Ethernet, dual USB (only one for the V71), LCD interfaces and other peripherals.
If you look closely at the price range, the i.MXRT is obviously cheaper than its competitors due to lack of flash mostly. Users looking at the total BOM cost for their application will see that 2MB of quad-SPI flash is only a couple of dollars making the value proposition worth looking at.
There are lots of other factors to take into account depending on your design, including performance analysis (speed, power consumption), cost to get your code flashed, cost to optimize software (location of code and data in RAM/Cache), PCB space constraints and much more. Your actual mileage may vary…
The flash-less area is a segment to watch, especially in the mid-tier to high end.
No significant change.
There were 3 EFR32BG parts (Bluetooth) adding new package/temperature combinations to the existing family
Cypress added a dozen parts to the FM3 family (CY9AFxxxxxG-MNE2).
STM32 had only new temperature/package variants of existing parts.
No significant change.
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