PSoC6 expands to the low end
30
Oct
2017
More products are coming under the PSoC6 banner this month. Cypress is expanding toward the low end with 50MHz devices as well as non Bluetooth versions. This contrasts with the calm of TI, SiLabs, NXP (soon-to-be Qualcomm) or worse, Microchip who is retiring close to 50 parts this month from its original portfolio. ST and Microchip/Atmel are pushing higher temperatures with respectively 125C and 105C.
Atmel/Microchip
We noticed a few additions (6 products with CN and CNR suffix) in the Cortex-M4-based SAM4E family with higher temperatures for the BGA packages (105C) while the 8-bit ATtiny41 expanded toward the low end with 6 ATtiny414/6 featuring 20 MHz, 4kB of Flash and 256 bytes of RAM.
We noticed a few additions (6 products with CN and CNR suffix) in the Cortex-M4-based SAM4E family with higher temperatures for the BGA packages (105C) while the 8-bit ATtiny41 expanded toward the low end with 6 ATtiny414/6 featuring 20 MHz, 4kB of Flash and 256 bytes of RAM.
Dialog
No change.
No change.
Infineon
No change.
No change.
Microchip
This month, Microchip performed some cleanup by removing close to 50 parts, none were added and here is the split:
This month, Microchip performed some cleanup by removing close to 50 parts, none were added and here is the split:
- About half were DSPIC33EP64/128/256/512
- A quarter were PIC16(L)F1xxx
- The remaining parts were from the PIC24EP128/256/512 family
Nordic
No change.
No change.
Nuvoton
No change.
No change.
NXP
No change.
No change.
Renesas
No significant changes this month at Renesas RX and RL78.
No significant changes this month at Renesas RX and RL78.
SiliconLabs
No change.
No change.
Spansion/Cypress
Cypress is building its PSoC6 family and we are updating our last post with new devices released this month, 25 devices overall.
Cypress is building its PSoC6 family and we are updating our last post with new devices released this month, 25 devices overall.
The PSoC 6 MCU architecture is built on a low power 40nm process, embeds a Cortex-M4 and an optional Cortex-M0+ core. Active power consumption can be as low as 22-µA/MHz (M4) and 15-µA/MHz (M0+).
The PSoC6 is comprised of 4 lines:
- PSoC60 – value line: only a 50MHz Cortex-M4 and basic CapSense with a max of 128/512kB of RAM/Flash.2 parts this month, the CYC8C6016/36BZI-F04
- PSoC61 – programmable(?) line: boosts frequency to 150MHz and memory to 288/1024 kB of RAM/Flash with additional CapSense features, crypto acceleration and USB.
7 parts were added. - PSoC62 – performance line: adds a 100MHz Cortex-M0+ and a full trusted execution environment.
5 parts were added. - PSoC63 – connectivity line: add BLE including its PHY and doubles the memory footprint. 12 parts are available. If we dig deeper, it is interesting to see that the PSoC63 distinctive feature is BLE. If it can run a full BLE stack on a Cortex-M4 at 50MHz, how will the integration with the application code happen is an open question. The PSoC63 borrows lower features from the other lines, in particular:
- PSoC631: only a Cortex-M4 running at 50MHz, optional crypto, no Capsense
- PSoC633: Cortex-M4 running at 150MHz, no crypto, optional Cortex-M0+ and Capsense
- PSoC634: full house
11 parts were added.
ST Microelectronics
Nothing stood out this month at ST. In all, 16 part numbers came up, most with T&R packing. A few were still worth it:
Nothing stood out this month at ST. In all, 16 part numbers came up, most with T&R packing. A few were still worth it:
- The STM32F401/412 and STM32L433 got +125C temperature grade.
- The STM32H74/53AII6 are in proposal mode. These are UFBGA variants with -40C +85C temperature grade.
Texas Instruments
The XCC2640R2FTWRGZTQ1 was removed.
Newsletter | Permalink.
← PSoC6 BLE coming out of the woods The lowest frequency Cortex-M →
The XCC2640R2FTWRGZTQ1 was removed.
| Sign up for our newsletter |