Welcome to the first edition of the Keremi Competitive Product Review. This newsletter is designed to provide you unique insights into leading semiconductor IC and consumer electronics product portfolios as well as the tools available to help you and/or your organization make informed decisions.
Comparing products from different vendors is a daunting challenge for product marketers, tactical marketers, pricing managers, R&D teams and everyone involved in the product lifecycle. A product manager with a product line – e.g. digital or analog semiconductors, cell phones, digital cameras or other consumer electronics – has thousands of data points and dozens of ways to view the data. Other organizations (e.g. Business Development, R&D) require their unique views. Pulling all of these distinct reports together in spreadsheets or presentations can be your worst nightmare.
Let’s look at the process of analyzing two competiting – STMicroelectronics and NXP – product portfolios to extract their respective value. We will pick the digital semiconductor market, more specifically the microcontroller segment (MCU). The competition is intense and products are numerous. The MCU market has experienced significant changes over the last few years, in particular as ARM® gained significant momentum in this segment thanks to the Cortex M families.
In the table below, on the left hand side, dubbed “Process”, we look at how we perform an analysis. On the right hand side, “Analysis Result” we discuss the actual result of the analysis.
The point of this exercise is to consider the challenges we meet as we manually go through the Process.
Is the time-consuming and never-ending exercise of collecting and crunching data feasible? If yes, does it make sense? We then consider the Keremi solution: how does it boost your efficiency?
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| Task |
Manual |
Keremi |
| Gather detailed parametrics on 400 products all with different formats |
Are you kidding me? |
Data is already in place |
| Align incompatible taxonomies coming from different sources |
Should I use Excel or a database? |
Incompatible taxonomies are reviewed and aligned into a standardized taxonomy |
| Normalize prices to a defined custom model |
Excel can handle this easily, hmm, maybe with macros |
Each user can define a custom model that will be applied to both internal and publicly available data |
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Let’s look at close to 400 parts and extract a high level view of ST and NXP’s respective portfolios.
While STMicroelectronics (STM) is considered one of the pioneers (with TI/Luminary Micro) of Cortex M-based products, NXP has deployed an array of products based on the Cortex M0, M3 and M4 cores, as illustrated in the following graph. We can also clearly see the breadth of products STM offers from $1 to $13 and initial products from NXP positioned at the bottom of the price range.
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| Task |
Manual |
Keremi |
| Create chart based on product taxonomy and filters |
I chose XLS, but I want to have 3 different views of my data… |
Sort products on criteria you define. Drag and drop products into the chart, takes just a second. Save your views for reuse |
| Switch X and Y axis between parameters of the taxonomy |
Well, need to create a new chart for each X/Y combination |
Single-click selection of each axis across any dimension of the taxonomy |
| Zoom and pan, select products based on criteria |
I’m losing my calm here. |
Single-click pan or zoom |
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| STM CORTEX M3 PRODUCT PORTFOLIO |
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With close to 300 products in its STM32 families, STM owns one of the most diverse Cortex M3 portfolios. See the illustration below.
The STMicro portfolio consists of the STM32F (271) and STM32L low power (27) families. The release plan for the STM32F portfolio started with two sub-families in the mid-range price (now roughly $3 to $5 USD) with 64/128k Flash: the low cost 36 MHz STM32F101 (Access Line) and the 72 MHz USB-equipped STM32F103 (Performance Line). In a second wave of deployment, flash and RAM memory were increased – the XL suffix – and additional packages were proposed.
The 102 was derived to provide an intermediate frequency step (48 MHz) and added a USB FS port to the 101. Around the same time, the peripheral-limited 24 MHz F100 (Value Line) specifications appeared with various memory configurations (Flash & RAM).
Finally, the 105/107 (Connectivity Line) and 215/217 added a CAN, USB OTG (HS for the 2xx), Ethernet and higher frequencies (72/120 MHz) to complement the portfolio and cover applications needing higher performance.
STM decided to use the same Cortex M3 core to tackle the power consumption challenge with the STM32L and achieved a 223 uA/MHz dynamic power consumption (L151C8). The move facilitates transitions from one family to the other with a strong reuse of the ecosystem (e.g. tools, software, boards). Very similar to the F102 in functionality (USB FS, no PHY), it is optimized for battery-powered devices, and came more recently with specifications surfacing in July 2010.
A roadmap featuring Cortex M0 and Cortex M4 has been announced in November 2010 with devices sampling before the end of 2011. Was this a move to counter NXP’s product portfolio?
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| Task |
Manual |
Keremi |
| Switch X and Y axis between parameters of the taxonomy |
Well, need to create a new chart for each X/Y combination |
Single-click selection of each axis across any dimension of the taxonomy |
| Zoom and pan, select products based on criteria |
This is it… I quit! |
Single-click pan or zoom |
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| NXP CORTEX Mx PRODUCT PORTFOLIO |
NXP covers much the same target markets (from low power to high performance) as ST. However, the company took a very different approach with its LPC family. We will focus on the Cortex-based products although its portfolio includes more than 200 other ARM7, ARM9 and 80C51 parts.
More than a year after STM released specifications of its STM32F101/3, NXP unveiled details of its Cortex M3 LPC1700 family. NXP initially pushed a mid- to high-range family with 100 and 120 MHz frequencies and expanded its portfolio quickly on both the lower and higher ends. Contrary to STM, who has stayed faithful to the Cortex M3 across its portfolio, NXP chose the M0 to support lower power applications. While losing some instructions of Thumb2 and a hardware divide, the power is reduced to 130 uA/MHz for the LPC111x family. Other sub-families include the LPC11C (with CAN controller and CAN PHY) and LPC11U (with USB controller). NXP also tried the extreme with the 2.2×2.3mm 50 MHz LPC11UK sporting 32kB of Flash and 8kB of RAM.
At the other end of the spectrum, NXP proposes the loaded LPC18xx @ 150 MHz with CAN, optional Ethernet and USB HS PHY interfaces. But it also innovated with its dual core LPC43xx, integrating a control Cortex M0 and a number crunching Cortex M4. The other interesting bit is found in the absence of Flash according to the first released specifications of the parts. The MCU relies instead on external serial Flash to supply code and data to the core. The architecture has definite advantages:
- smaller die and shorter test times reduce risks, tests, and eventually costs, especially for the initial product launch
- external memory allows customer to choose from multiple vendors
But also carries other drawbacks:
- interface can be a bottleneck (although NXP proposes a quad-lane SPI interface)
- additional external component increases the PCB size
- system power consumption is likely higher than an integrated solution
- system cost (MCU + Flash) is likely higher
The LPC43xx family also includes parts with up to 1MB of Flash, but details have not been released yet. It will be interesting to see whether the Flash-less versions will outsell their flash equivalents.
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| Task |
Manual |
Keremi |
| Extract statistical data from each product family across competitors |
Need to use Excel statistical functions |
The Keremi platform provides you with a high-level statistical view of your data that you can use to start your analysis. Finalize the table with the help of the dashboard |
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| MAKING SENSE OF IT ALL |
Combining both portfolios into a human readable format is a monumental challenge, so we will concentrate on a few defining parameters, namely; core type, Flash, RAM and Frequency, and peripherals; USB, CAN and Ethernet. There are obviously many other parametrics, but these tend to group parts into fairly homogenous subsets.
In the table below, we can now put the NXP and STM families side-by-side and define 4 four main groups:
- low power/low cost with limited memory, and at best, either USB or CAN
- low cost with less focus on power consumption
- feature rich that includes a nice set of peripherals
- high end
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| Task |
Manual |
Keremi |
| Refresh data for the next review |
How do I know which products have appeared/ disappeared or just been altered?
Is there a magic function in Excel?
BTW, do I need to get the 400+ products raw data again?
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Regular updates are provided through the dashboard and allow you to examine in detail changes in your competitors’ products, be they new additions, altered versions, or those that were EOL’d or just plain removed |
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| NXP/STM CORTEX MX PRODUCT PORTFOLIO |
| Now we have some valuable and rather easily discernable data to compare. Nice! But is it enough to make a sound decision?
We’ve only just begun.
In the next installment of our series, we will look into how STM and NXP bring value vs. price for each defined sub-set, thus moving us one step closer to making better fact-based decisions. |
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